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Sunday, April 26, 2009

AMD plans 16-core server chip

Advanced Micro Devices is designing a server chip with up to 16 cores, quadrupling the count of its current quad-core server chips, the company said Wednesday.

Code-named Interlagos, the chip will have between 12 and 16 cores, and will be released in 2011, the company said at a press conference that was webcast. Interlagos will be a follow-up offering to the 12-core chip code-named Magny-Cours that AMD plans to release in the first quarter of 2010.

Increasing chip core counts is a way for AMD to improve performance while trying to reduce the power drawn by the processors. Adding more cores also squeezes more performance out of servers, which can reduce the total server count in data centers. That helps cut hardware acquisition and energy costs, said Pat Patla, vice president of the server platform unit at AMD.

The 16-core chips could go into servers with between two to four sockets, which could mean a maximum of 64 cores per server. The chip will be part of the Opteron 6000 series of chips, which the company said will likely be used in data-center servers.

The chips will be more for servers that handle a variety of applications -- including simulations and databases -- that need plenty of processing power, said Dean McCarron, principal analyst at Mercury Research.

"Given the consumer environment and those workloads, it will be a while before 16 cores is mainstream," McCarron said.

AMD's Opteron chips compete with Intel's Xeon server chips, but Intel has only announced an 8-core version of its Xeon chips with a chip code-named Nehalem-EX, due for release in 2010. Intel has also announced a Larrabee chip that has "many cores," but it is more for a supercomputing environment with high-end applications like 3D graphics rendering.

But there is more to chip performance than just adding cores, AMD's Patla said. The value of chips revolves around delivering a balanced computing performance and cutting energy and hardware acquisition costs, he said.

AMD in its future chips will integrate advanced power management features and instruction sets at the chip level to better execute tasks in virtualized environments. Users will be able to better control power consumption by manually capping the power drawn by cores and shutting off idle cores. AMD is also making improvements at the hypervisor levels to double the number of virtual machines that can be built on current AMD-based server chips.


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